1. Field of the Invention
The present invention relates to a discrete cosine transforming apparatus with a pipeline processing ability.
2. Description of the Related Art
U.S. Pat. No. 4,385,363, issued May 1983, may be enumerated as a typical example of the discrete cosine transforming apparatus of this type. In this discrete cosine transforming apparatus, two types of basic arithmetic circuits are arrayed in five stages Basic arithmetic circuits A, i.e., shuffle/add circuits, are arrayed at the first, second and fourth stages, and basic arithmetic circuits C, i.e., shuffle/add/multiply, are arrayed at the the third and fourth stages. The shuffle/add circuit A includes a circuit for temporarily storing input data and a circuit for addition or subtraction. The shuffle/add/multiply circuit C includes a circuit for temporarily storing input data, two multipliers, and a circuit for adding or subtracting the results of the multiplication. The prior art apparatus uses four multipliers for a 16th-order cosine transform. To effect an inverse transform, an arithmetic circuit is changed to another arithmetic circuit or the basic arithmetic circuit A of the first stage is designed so as to have two multipliers, like the basic arithmetic circuit C.
Thus, to effect the 16th-order cosine transform and its inverse transform, at least four multipliers and selectors at the input and the output of the basic arithmetic circuit are required To improve an accuracy of the arithmetic operation, a considerably large hardware is required.
Thus, the prior apparatus has a disadvantage that the higher the accuracy of the arithmetic operation is, the larger the hardware scale is.